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Extending network-on-chip (NoC) expertise to chiplets

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Extending network-on-chip (NoC) expertise to chiplets

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By Frank Schirrmeister, Arteris
EDN (November 15, 2023)

A monolithic built-in circuit (IC) is one wherein every thing is carried out on a single silicon die, additionally known as a chip. The most sensible measurement for a die utilizing excessive ultraviolet (EUV) lithographic course of is round 25 mm x 25 mm = 625 mm2. Although it’s doable to construct bigger cube, their yields begin to fall off quickly. So, one resolution for at present’s multi-billion transistor units is to disaggregate the design into a number of smaller cube mounted on a silicon interposer, offered in a single package deal. In this case, the smaller cube are known as chiplets or tiles, whereas the ultimate gadget is called a multi-die system.

There are a number of benefits related to adopting a chiplet-based method. These embody elevated yield, diminished die value, and the power to implement totally different capabilities on optimum course of applied sciences. Also, there are elevated flexibility and customization choices as a result of designers can choose and select the suitable chiplets for various purposes. This technique delivers elevated scalability as a result of extra chiplets can deal with increased workload calls for and diminished time to market by reusing present chiplets in numerous mixtures throughout totally different merchandise.

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